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?2008 Fairchild Semiconductor Corporation
 
www.fairchildsemi.com
FAN9611 " Rev. 1.1.7
34
Physical Dimensions
 
Figure 66. 16-Lead SOIC Package
 
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchilds worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
 
Always visit Fairchild Semiconductors online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
.
 
 
 X 45?/DIV>
DETAIL A
SCALE: 2:1
8?/DIV>
0?/DIV>
NOTES: UNLESS OTHERWISE SPECIFIED
  A) THIS PACKAGE CONFORMS TO JEDEC
  MS-012, VARIATION AC, ISSUE C.
  B) ALL DIMENSIONS ARE IN MILLIMETERS.
  C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
FLASH AND TIE BAR PROTRUSIONS
  D) CONFORMS TO ASME Y14.5M-1994
  E) LANDPATTERN STANDARD: SOIC127P600X175-16AM
  F) DRAWING FILE NAME: M16AREV12.
SEATING PLANE
GAGE PLANE
C
C
0.10
SEE DETAIL A
LAND PATTERN RECOMMENDATION
PIN ONE
NDICATOR
1
16
8
M
0.25
9
C B A
B
A
5.6
1.27
0.65
1.75
10.00
9.80
8.89
6.00
1.27
(0.30)
0.51
0.35
1.75 MAX
1.50
1.25
0.25
0.10
0.25
0.19
(1.04)
0.90
0.50
0.36
(R0.10)
(R0.10)
0.50
0.25
4.00
3.80
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